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Cadence Introduces Maestro, a Domain-Specialized AI Model Portfolio to Revolutionize Agentic Chip and System Design

Business Wire•26/10/2026•09:00 ET
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Key Highlights

  • ➤Cadence introduces Maestro domain-specialized AI model portfolio for agentic chip and system design
  • ➤Initial results show up to 30% higher quality versus general-purpose foundation models
  • ➤Initial results show up to 5X greater token efficiency versus general-purpose foundation models
  • ➤First Maestro models available to select early access customers in fourth quarter of 2026
  • ➤Socionext expects up to 5X overall productivity gains deploying Cadence InnoStack in production

Expert Statements

Anirudh Devgan, President and CEO at Cadence

“Revolutionizing complex engineering tasks requires deep domain-specialized intelligence. Combining our Maestro portfolio of domain-specialized models with leading frontier and open-weight models enables our AI Super Agents to drive Cadence EDA and SDA tools with exceptional skill and efficiency to transform chip and system design.”

Tim Costa, Vice president and general manager of industrial and computational engineering at NVIDIA

“Agentic chip design requires AI that can generate design content, evaluate tradeoffs and learn from verified engineering results. Our collaboration with Cadence brings NVIDIA Nemotron, OpenShell and deep engineering expertise to Maestro’s domain-specialized models. By grounding reinforcement learning in feedback from EDA tools and deterministic solvers, we can teach agents to make better design decisions based on how well their work meets engineering objectives and constraints.”

Hisato Yoshida, COO of Socionext

“We are deploying Cadence’s InnoStack AI Super Agent into our production design environment. By combining agentic AI with advanced EDA tools for physical design, we expect up to 5X overall productivity gains while maintaining design quality. We see the Maestro portfolio as the next step in driving even greater efficiency across our design process.”

Garima Sharda, Vice president of engineering at Silicon Labs

“Ultra-low power devices require innovation across disciplines. Agentic AI unlocks new power opportunities. By leveraging the Cadence Verisium Debug as part of ChipStack AI Super Agent, our engineering teams have achieved acceleration in root-cause analysis and end-to-end debug during pre-silicon low power verification. We look forward to realizing further benefits through Cadence’s Maestro domain-specialized models.”

Cadence Introduces Maestro, a Domain-Specialized AI Model Portfolio to Revolutionize Agentic Chip and System Design

* Cadence Maestro portfolio introduces domain-specialized AI models purpose-built to power agentic chip and system design.

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