Credo Breaks the Memory Wall Using AMD Programmable Logic-Based AI Accelerators
Business Wire•13/10/2026•09:00 ET
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Key Highlights
- ➤Credo and AMD built a working OmniConnect Weaver emulation platform.
- ➤Terabytes-class LPDDR memory reaches programmable-logic XPUs over VSR links.
- ➤AMD Versal AI Edge Series Gen 2 evaluation board hosts the demonstration.
- ➤Expanded memory runs transparently without application software modifications.
Expert Statements
Vishal Shah, Vice President of Product, Credo
“Memory is what limits inference today, not compute, and the gap widens every generation”
Vishal Shah, Vice President of Product, Credo
“By combining the versatile AMD Versal adaptive SoC platform with Credo's OmniConnect Weaver memory expansion technology, we are enabling customers to build scalable memory architectures that can unlock higher performance and greater efficiency for next-generation AI systems.”
Manuel Uhm, Director of Silicon Marketing, Adaptive and Embedded Computing Group, AMD
“As AI inference workloads scale, customers need a practical path to higher memory performance without sacrificing the flexibility that drove the need for a programmable logic design in the first place”
Manuel Uhm, Director of Silicon Marketing, Adaptive and Embedded Computing Group, AMD
“This collaboration with Credo demonstrates how customers can unlock significantly more memory bandwidth and capacity on the AMD Versal AI Edge Series Gen 2 device while preserving the efficiency, power and time-to-market advantages of programmable logic-based designs.”
Credo Breaks the Memory Wall Using AMD Programmable Logic-Based AI Accelerators
Credo Demonstrates OmniConnect Running on AMD Versal™ Adaptive SoC Architecture to Offer System Integrators Terabyte-Class Memory Capacity and Bandwidth Without Waiting on Custom Silicon
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