Rambus Advances Power-Efficient AI Infrastructure with Industry-Leading PMIC Designed for LPDDR6 SOCAMM2

Rami Sethi, Senior vice president and general manager of Memory Interface Chips at Rambus

“Inference and agentic AI are driving exciting new opportunities for memory innovation across the data center”

Rami Sethi, Senior vice president and general manager of Memory Interface Chips at Rambus

“Our new PMIC designed for LPDDR6 SOCAMM2 builds on our leadership in server-memory power management. Working closely with industry leaders in alignment with the broader AI ecosystem, we are helping enable the high-performance, power-efficient memory architectures that maximize tokens per watt for AI workloads.”

Praveen Vaidyanathan, Vice president and general manager of Cloud Memory Products at Micron Technology

“As AI systems place growing demands on memory capacity, bandwidth and power efficiency, LPDRAM is becoming an increasingly important technology for next-generation AI infrastructure”

Praveen Vaidyanathan, Vice president and general manager of Cloud Memory Products at Micron Technology

“Micron has helped pioneer low-power memory for the data center and continues to work closely with ecosystem partners to advance industry standards such as SOCAMM2. We welcome Rambus' continued investment in LPDDR6 power management solutions, which help strengthen the broader low-power memory ecosystem.”